![\"fusion-360-pcb-design\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/Technology-Center-Toronto-2503-1024x682.jpg\")
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Logic gates are the fundamental building blocks of digital electronic circuits. They follow Boolean Algebra<\/a> rules, which are very easy to understand and implement for everyone\u2014including beginner-level designers. They help circuits make decisions, so they form a significant chunk of the microprocessor and microcontroller circuitry<\/a>.<\/span><\/p>\n <\/p>\n Essentially, there are seven types of logic gates, out of which we have discussed three (AND, OR, NOR) in the previous blog post<\/a>. In this blog post, we will cover the following gates and see how they work when incorporated in digital circuits<\/a>:<\/span><\/p>\n <\/p>\n By the end of this post, you will be able to perform various mathematical operations using logic gates and build useful circuits that use multiple logic gates\u2019 features.<\/span><\/p>\n <\/p>\n NOT gate is, by far, the simplest logic gate because it performs the fundamental function of inverting, which is why a NOT gate is also called an Inverter<\/a>. What does a logic inverter do?\u00a0<\/span><\/p>\n <\/p>\n A logic inverter, or a NOT gate, inverts the logic level present on its input terminal. For instance, if there is a \u20181\u2019 on a NOT gate\u2019s input, it will generate a \u20180\u2019 as the output and vice versa. NOT gate is the only gate with a single input terminal, while all the other gates have two or more input terminals. The Boolean equation for a NOT gate can be given as follows:<\/span><\/p>\n <\/p>\n F=A<\/strong><\/p>\n <\/p>\n Which generates the following truth table:<\/span><\/p>\n <\/p>\n We can use resistors<\/a> and transistors<\/a> to represent the internal working of a NOT gate. The transistor base acts as the input terminal, while the output is measured from the collector terminal. The circuit is designed, as shown in the diagram below.<\/span><\/p>\n <\/p>\n <\/p>\n <\/p>\n Voltage probes<\/a> are used to measure the logic level at the input and output terminals. V(A) represents the point where the input signal is measured, while V(F) represents the output terminal. As you can see, a 0V signal is present at the input, which implies that the NOT gate must invert this signal. Let\u2019s study the simulation results.<\/span><\/p>\n <\/p>\n <\/p>\n <\/p>\n The blue line represents the input signal, which is present at a logic level 0 (0 Volts), while the red line represents the output signal, which resides at logic level 1; this is precisely how a NOT gate works. If logic level \u20181\u2019 is present at the input, the output would be \u20180\u2019.<\/span><\/p>\n <\/p>\n Simple NOT Gate Circuit<\/strong><\/p>\n <\/p>\n Let\u2019s see how we can use this gate to implement a practical circuit used in real-life applications. Consider a cabinet where you wish to install a bulb that lights up when the cabinet door is opened and lights off when the door is shut. To do so, you will need a pushbutton switch installed inside the cabinet, such that, when the door closes, the pushbutton remains pressed, and when the door is opened, the button goes back to its original state; where it is not pressed.\u00a0<\/span><\/p>\n <\/p>\n We can simulate this scenario by using a digital pulse signal representing the door\u2019s opening and closing. When the door is open, the button is not pressed; hence it is characterized by a logic level 0. The NOT gate inverts this signal into a high logic level, which in turn, switches the light on. The circuit and its simulation are illustrated below:<\/span><\/p>\n <\/p>\n <\/p>\n <\/p>\n <\/p>\n In the simulation results shown above, the blue line represents the pushbutton input, which means when the cabinet door is closed, the input is at logic level 1. The output signal (represented by green and red) is low, which means the bulb is turned off. Similarly, when the cabinet door opens, the bulb lights up.<\/span><\/p>\n <\/p>\n NAND gate is one of the most commonly-used logic gates. It is a combination of AND gate and NOT gate. If you look at the symbol, it is merely an AND gate with a tiny \u2018bubble\u2019 connected in series with it; this bubble represents the inverter, i.e., NOT gate. The operation of the NAND gate is similar to AND except that the output is inverted. For instance, if you have two \u2018high\u2019 signals and perform the AND operation on them, you will get a high output. But with NAND, you will get a low output for two 1\u2019s at the input terminals. Thus, we can represent the NAND gate with the following Boolean equation:<\/span><\/p>\n <\/p>\n F= A.B<\/strong><\/p>\n <\/p>\n Which generates the following truth table showing the output, F, for all possible input combinations:<\/span><\/p>\n <\/p>\n Like the previously discussed gates, we can represent the NAND gate\u2019s internal working using transistors and resistors, as shown in the circuit diagram below. Two transistors are connected in series, with the emitter the first one connected to the second transistor\u2019s collector. The two transistors\u2019 bases act as input terminals of the NAND gate, while the output is measured from the first transistor\u2019s collector. For the output to be high, either one of the transistors must be cut off. We can verify the results through the simulation graph shown below.\u00a0<\/span><\/p>\n <\/p>\n <\/p>\n <\/p>\n The output of the NAND gate is low only when both inputs are high. This can be seen from the simulation results above, where the red line indicates the output pulse while the blue and green pulses represent the input signals.<\/span><\/p>\n Now that you know how a NAND gate works, let\u2019s design a simple circuit where a NAND gate performs a real-life task. You can use a NAND gate to build a simple burglar alarm<\/a> that goes off when either the burglar\u2019s shadow is detected, or the burglar stands on the pressure sensor present at the house entrance, or if both conditions are met simultaneously.\u00a0<\/span><\/p>\n <\/p>\n An LDR<\/a> is used to detect the burglar\u2019s shadow, while a pressure sensor is used to detect the thief\u2019s presence through the pressure that their body exerts on the ground. To simulate this scenario, the voltage sources are used to represent the LDR and the pressure sensor. The LDR and pressure sensor both produce a low output when the burglar is present. The simulation results are as follows:<\/span><\/p>\n <\/p>\n <\/p>\n <\/p>\n <\/p>\n The blue pulse represents the alarm\u2019s voltage levels, showing that the alarm is only off when neither there is a shadow present at the entrance nor any pressure sensed. This is the case when no one is present at the door of the house.\u00a0<\/span><\/p>\n Using a single NAND gate to build a circuit was pretty easy, so let\u2019s move on to designing a circuit with multiple NAND gates. We can use various 2-input NAND gates to design a 4-input NAND gate. When all four inputs are high, the output will be low, and when either one of the inputs is 0, the outcome will be high. Two NAND gates are used as input gates. Then two intermediate NAND gates are present, which sends the signal to the output gate. A total of five NAND gates are used to design a 4-input NAND gate, as shown in the circuit below.\u00a0<\/span><\/p>\n <\/p>\n <\/p>\n <\/p>\n <\/p>\n The red pulse shows the output (F) of the 4-input NAND gate circuit, which is low only when all four inputs (A, B, C, D) are high. Otherwise, the output remains high.\u00a0<\/span><\/p>\n <\/p>\n XOR gate, also known as the Exclusive OR gate, is widely used in many logic and combinational circuits. The output of this gate is high only when both of its inputs are different with respect to each other. i.e., if the input signal is either \u201c01\u201d or \u201c10,” only then the output would be \u201c1.” Otherwise, the output will be low, i.e., logic level 0.<\/span><\/p>\n <\/p>\n Alternatively, we can understand the working principle of the XOR gate in another way. Its output is high when there is an odd number of 1s present at the input terminals. For instance, if we have the inputs as A=1 and B=0, then we have only one 1, i.e., an odd number of 1s present at the input, so the output will be high, i.e., F=1. The Boolean expression for a 2-input XOR gate is written as:<\/span><\/p>\n <\/p>\n F=AB+AB<\/strong><\/p>\n <\/p>\n Which generates the following truth table:<\/span><\/p>\n <\/p>\n We can understand the XOR gate\u2019s internal working using a combination of other logic gates such as OR, AND, and NAND. Remember that the XOR gate is not an original gate, it is a combination of basic gates that we have studied earlier.\u00a0<\/span><\/p>\n Before moving on to the circuit, it is essential to understand that there are different ways to write Boolean equations. You can simplify an equation and change it into another form by applying simple Boolean algebra rules. We won\u2019t go into the details of the mathematics involved here, but all you need to know at this stage is that we can also write the Boolean equation for a 2-input XOR gate as follows:<\/span><\/p>\n <\/p>\n F=A+B.(A.B)<\/strong><\/p>\n <\/p>\n Now let\u2019s move on to the XOR equivalent circuit.<\/span><\/p>\n <\/p>\n <\/p>\n As you can see, the inputs A and B are applied to the OR and NAND gates, and then their outputs are connected to the inputs of an AND gate. The outcome is exactly what we get using an XOR gate.\u00a0\u00a0<\/span><\/p>\n <\/p>\n If you form the equation for the output F, the gates\u2019 equations will match the OR gate equation. The equation for the output of the OR gate is A+B and for NAND is (A.B), and if we put these equations in the AND gate equation, we will get <\/span>F=A+B.(A.B).<\/p>\n <\/p>\n <\/p>\n From the simulation results, it can be determined that the output is high whenever the inputs are not identical, i.e., when the input is either A=0 and B=1 or A=1 and B=0.\u00a0<\/span><\/p>\n We can build a half-adder using an XOR gate and an AND gate. This circuit adds two bits at a time and generates two output bits; one is called the \u201csum,\u201d and the other one is called \u201ccarry.\u201d It is analogous to manually adding large numbers in decimal format, where we carry numbers greater than 9 on the number to the left, and then add it. The following circuit is what a half-adder looks like:\u00a0<\/span><\/p>\n <\/p>\n <\/p>\n The output of this circuit is simulated as follows:<\/span><\/p>\n <\/p>\n <\/p>\n To understand this better, let\u2019s study the truth table for a half-adder.<\/span><\/p>\n <\/p>\n <\/p>\n When we add 1 and 0, the sum is 1, and the carry bit is 0. However, when two 1s are added together, the sum is 0, and the carry bit is 1. This is exactly what is happening in the half adder circuit, and you can confirm that by studying the simulation graph where the red pulse represents the sum while the green pulse represents the carry bit.\u00a0<\/span><\/p>\n How about using multiple XOR gates in the same circuit? An even parity bit generator for a 3-bit message can be made by using various XOR gates in the same circuit. A parity generator<\/a> is a type of error-correction tool used in digital circuits. An even parity generator will first scan the message for the number of 1s. If they are even, there is no need to add a 1; hence it will add a 0 as a parity bit. Otherwise, if the number of 1s is odd, then the parity generator will add a \u201c1\u201d as a parity bit to make the number of 1s even. Here is what the circuit looks like.<\/span><\/p>\n <\/p>\n <\/p>\n <\/p>\n <\/p>\n In the simulation results, it is evident that the parity bit is 1 when the input has an odd (either 1 or 3) number of 1s, and it is 0 when the number of 1s in the input signal is even (2).\u00a0<\/span><\/p>\n XNOR gate, also known as Exclusive NOR gate, is a part of many digital electronic circuits. Its symbol is the same ad XOR, except that there is an inverter \u201cbubble\u201d present at the output, which implies that XNOR\u2019s output is opposite to that of the XOR gate. We can also represent the XNOR gate as an XOR gate in series with an inverter, as shown below.<\/span><\/p>\n <\/p>\n <\/p>\n The XNOR gate\u2019s output becomes 1 when both of its inputs are the same for each other, i.e. for a 2-input XNOR gate, the output will be high for input combinations \u201c00\u201d and \u201c11.” Otherwise, when the inputs are different concerning each other, the output is low.\u00a0<\/span><\/p>\n <\/p>\n Since this gate produces a high output when its inputs are the same, it is also called as an \u201cequivalence gate,\u201d because you can detect if two inputs are logically equal or not. Another way to understand an XNOR gate\u2019s working is to produce a high output when the number of 1s at the input terminals is even. For instance, if the input combination for a 3-input XNOR gate is \u201c101,\u201d then the output would be high (1) because there are two 1\u2019s present at the input terminals, which is an even count. <\/span>The Boolean equation for the XNOR gate is written as:<\/span><\/p>\n <\/p>\n F=A.B+A.B<\/strong><\/p>\n <\/p>\n Which generates the following truth table for a two-input XNOR gate:<\/span><\/p>\n <\/p>\n We can understand an XNOR gate\u2019s internal working by breaking it down into a combination of the basic gates such as AND, OR, and NOT gates. Using the Boolean equation, we can design the simple logic gates circuit as follows:<\/span><\/p>\n <\/p>\n <\/p>\n <\/p>\n <\/p>\n The simulation results show a blue-colored output pulse, which is high only when both the inputs are logically equal. Otherwise, the output resides at logic level 0. XNOR gates are widely used in digital electronic circuits, including full-adders, subtractors, and parity checkers and generators.<\/span><\/p>\n Now that you have studied the different types of logic gates, their equations, truth tables, internal working, circuits, and applications, let\u2019s see how we can combine all or some of the seven types of logic gates in a single circuit.\u00a0<\/span><\/p>\n A 4-bit comparator<\/a>, as the name suggests, compares two 4-bit signals and generates the result as either equal to (A=B), lesser than (A<B), or greater than (A>B). It uses a combination of different logic gates to compare the four bits one-by-one. The first bit of the first word is compared with the first bit of the second word, and so on.<\/span><\/p>\n <\/p>\n Consider the first 4-bit word A = A<\/span>3A2A1A0 and the second word B = B<\/span>3<\/span>B<\/span>2<\/span>B<\/span>1<\/span>B<\/span>0<\/span>, where A<\/span>3<\/span> and B<\/span>3<\/span> are the most significant bits, while A<\/span>0<\/span> and B<\/span>0<\/span> are the least significant bits. A 4-bit comparator circuit for comparing the words A and B is shown below.<\/span><\/p>\n <\/p>\n <\/p>\n The input signals for the 8 bits are in the form of digital pulses that periodically swing between logic levels 0 and 1. The output is generated based on comparing the two 4-bit words formed as a combination of the 8 bits. The results are simulated below:<\/span><\/p>\n <\/p>\n <\/p>\n Here, the bold red line represents the A=B output terminal. At the point shown, the words A and B are equal; hence the v(equal) pulse is high. If you look at the bits\u2019 values carefully, you will see that A0=B0, A1=B1, A2=B2, and A3=B3.\u00a0<\/span><\/p>\n Another complex circuit example which uses several logic gates in the same circuit is a 3×8 decoder. It has three input lines (A, B, C) and eight output lines (Y0, Y1\u2026, Y7). An enable (EN) pin activates the output based on the input combination. Each output is activated via a 3-bit input code that is unique for each output.\u00a0<\/span><\/p>\n Using a combination of AND & NOT gates, we can build the circuit as follows:<\/span><\/p>\n <\/p>\n <\/p>\n Eight AND gates produce the outputs Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7, while the NOT gates are supplied with the inputs A, B, and C. The outputs vary according to the table below:<\/span><\/p>\n <\/p>\n <\/p>\n This can be verified through the simulation results shown below:<\/span><\/p>\n <\/p>\n <\/p>\n The output waveforms vary according to the truth table shown above. For instance, when all three input signals v(a), v(b), and v(c) are high, the output Y7 is activated, as shown in the simulation results.<\/span><\/p>\n <\/p>\n Logic gates are beneficial electronic components because they can perform many tasks, including mathematical operations and conditional programming. They are widely used in microcontrollers, microprocessors, and several other electronic devices present around you. All you need to know is how they work, and you can construct digital logic circuits all by yourself and check their results through EAGLE simulations<\/a>.\u00a0<\/span><\/p>\n <\/p>\n Are you ready to test out these exercises yourself? Fusion 360 gives you access to comprehensive electronics and PCB design tools in one product development platform<\/a>\u2014try it today!<\/p>\n <\/p>\n\n
NOT Gate<\/strong><\/h2>\n
![\"not-gate\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/1-300x140.png\")
<\/p>\n![\"not-gate-truth-table\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/Screen-Shot-2020-10-14-at-12.29.14-PM-300x163.png\")
<\/p>\nInternal Working<\/strong><\/h3>\n
![\"not-gate-internal-wroking\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/2-1024x643.png\")
<\/p>\n![\"not-gate-internal-wroking-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/3-1024x427.png\")
<\/p>\n![\"simple-not-gate-circuit\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/4.jpg\")
<\/p>\n![\"simple-not-gate-circuit-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/5.png\")
<\/p>\nNAND Gate<\/strong><\/h2>\n
![\"nand-gate\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/6-300x166.jpg\")
<\/p>\n![\"nand-gate-truth-chart\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/Screen-Shot-2020-10-14-at-12.30.29-PM-300x173.png\")
<\/p>\nInternal Working<\/strong><\/h3>\n
![\"nand-gate-internal-working\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/7.png\")
<\/p>\n![\"nand-gate-internal-working-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/8-1024x405.png\")
<\/p>\nSimple NAND Gate Circuit<\/strong><\/h3>\n
![\"simple-nand-gate-circuit\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/9.png\")
<\/p>\n![\"simple-nand-gate-circuit-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/10-1024x355.png\")
<\/p>\nMultiple Gate Design<\/strong><\/h3>\n
![\"nand-multiple-date-design\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/11-1024x663.png\")
\u00a0<\/strong><\/p>\n![\"nand-multiple-date-design-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/12-1024x490.png\")
<\/p>\nXOR Gate<\/strong><\/h2>\n
![\"xor-gate\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/13-300x158.jpg\")
<\/p>\n![\"xor-gate-truth-table\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/Screen-Shot-2020-10-14-at-12.31.33-PM-300x191.png\")
<\/p>\nInternal Working<\/strong><\/h3>\n
![\"xor-gate-internal\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/14-1024x621.png\")
<\/p>\n![\"xor-gate-internal-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/15-1024x521.png\")
<\/p>\nSimple XOR Gate Circuit<\/strong><\/h3>\n
![\"simple-xor-gate-circuit\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/18-1024x657.png\")
<\/p>\n![\"simple-xor-gate-circuit-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/17-1024x478.png\")
<\/p>\n![\"xor-gate-truth-table-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/Screen-Shot-2020-10-14-at-12.32.26-PM-300x171.png\")
<\/p>\nMultiple Gate Design<\/strong><\/h3>\n
<\/p>\n![\"xor-multiple-gate-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/19-1024x532.png\")
<\/p>\nXNOR Gate<\/strong><\/h2>\n
![\"xnor-gate\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/20-300x118.jpg\")
<\/p>\n![\"xnor-gate-truth-table\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/Screen-Shot-2020-10-14-at-12.33.29-PM-300x204.png\")
<\/p>\nInternal Working<\/strong><\/h3>\n
![\"xnor-gate-internal\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/21-1024x656.png\")
<\/p>\n![\"xnor-gate-internal-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/22-1024x410.png\")
<\/p>\nBuilding Complex Circuits Using Logic Gates<\/strong><\/h2>\n
4-Bit Comparator\u00a0<\/strong><\/h3>\n
![\"complex-circuit-logic-gate\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/23-1024x763.png\")
<\/p>\n![\"4-bit-comparator\u00a0\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/24-1024x478.png\")
<\/p>\n3×8 Decoder<\/strong><\/h3>\n
![\"3-8-decoder\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/25-1024x583.png\")
<\/p>\n![\"3-8-decoder-truth-table\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/Screen-Shot-2020-10-14-at-12.56.47-PM-1024x377.png\")
<\/p>\n![\"3-8-decoder-2\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/10\/26-1024x545.png\")
<\/p>\n
![\"download-fusion-360\"](\"https:\/\/www.autodesk.com\/products\/fusion-360\/blog\/wp-content\/uploads\/2020\/04\/Download.png\")
<\/a><\/p>\n